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 Harris Semiconductor
No. MM2500.1
October 1996
Harris Linear
HA2500/02 Spice Operational Amplifier Macro-Model
Author: David Riemer
Introduction
This application note describes the SPICE macro-model for the HA-2500/02, a precision high slew rate op amp. The model was designed to be compatible with the well known SPICE program developed by the University of California in hope that most simulation software vendors follow this basic format and syntax. A schematic of the macro-model, the Spice net listings and various simulated performance curves are included. The macro-model schematic includes node numbers to help relate the SPICE listing to the schematic. The model is designed to emulate a typical rather than a worst case part. Most AC and DC parameters are simulated. DC parameters for the HA-2502 macro-model are slightly degraded from those of the HA-2500, with the AC parameters remaining equivalent. Significant poles are included to give the most accurate AC and transient simulation with minimum complexity. Poles The two most significant poles of the HA-2500/02 are modeled by RC networks. Output Stage EX1, D1 and D2 model output current limiting. IH and IL are the power supply currents. DPH, DPL and GPS vary the supply currents based on the opamps output current. DL, DH, ECC and EEE provide voltage clamping on the output to simulate the typical output voltage swing. Some effects of output parasitics due to package capacitance and inductance are lumped with the poles. Parameters Not Modeled To maintain a simple macro-model not all op amp parameters are modeled. Most of the parameters not modeled are listed below: * Temperature Effects * Differential Voltage Restrictions * Input Voltage and Current Noise * Common Mode Restrictions * Tolerances for Monte Carlo Analysis * Power Supply Range
Model Description
Input Stage DP and DN represent the differential input resistance. Input bias currents are created by I1 and offset current is modeled with FA. Source VN represents the input offset voltage. No input parasitics due to package capacitance and lead inductance are included. Gain Stage G2, R2, CC, GOL, and RD simulate open loop gain. CC is the macro-model dominant pole capacitor.
Harris Corporation, Semiconductor Sector, makes no warranty, either expressed or implied, including but not limited to any warranties or merchantability and fitness for a particular purpose using this macro-model. This macro-model is provided solely and exclusively for use by Harris customers to assist them in the assessment of this product for possible appllications. In no event will Harris be liable for special, collateral, incidental, or consequential damages in connection with or arising out of the use of the macro-model. Although every effort has been made to ensure accuracy of the information contained in this application note, Harris assumes no responsibility for inadvertent errors. Harris reserves the right to make changes to the product and the macro-model without prior notice.
Copyright
(c) Harris Corporation 1996 1
Application Note MM2500/02 Spice Listing
* *COPYRIGHT (C) 1991 HARRIS CORPORATION *ALL RIGHTS RESERVED * *HA-2500 MACRO-MODEL *REV: 8-01-91 *BY: D.W. RIEMER * *PINOUT * .SUBCKT HA2500 1 2 4 5 3 .MODEL DP D IS=1E-14 .MODEL DN D IS=1E-14 .MODEL DV D IS=+2.7631E-15 .MODEL D1 D IS=1E-9 .MODEL D2 D IS=1E-9 .MODEL DX D IS=1E-20 * * INPUT STAGE *VALUE OF SOURCE VN MODELS VIO AND MAY BE ADJUSTED AS DESIRED. * VP 1 6 0 VN 2 7 +2E-03 I1 8 0 +1.9E-07 FA 2 0 VN +1.053E-01 DP 6 8 DP DN 7 8 DN FP 9 0 VP +4.053E+03 FN 0 9 VN +4.053E+03 GC 0 9 8 0 +5.4413E-08 GPP 9 0 4 0 +3.0598E-08 GPN 9 0 5 0 +5.4413E-08 IRX 0 9 -9.3646E-09 RT 9 0 1.0 * *POLES * EP1 10 0 9 0 1.0 RP1 10 11 +1.0613E+02 CP1 11 0 1E-10 EP2 12 0 11 0 1.0 RP2 12 13 +3.184E+01 CP2 13 0 1E-10 * N=+15.486 N=+15.486 N=.2 N=1 N=+1.0 N=+30.0 +IN -IN VCC VEE OUT *OUTPUT STAGE * G2 0 14 13 0 1.0 R2 14 0 +6.5577E+02 CC 14 15 +2.2E-11 GOL 15 0 14 0 +4.3777E+02 RD 15 0 +90.0 DH 15 16 DV DL 17 15 DV ECC 16 0 POLY 1 4 0 -2.7 1.0 EEE 17 0 POLY 1 5 0 +2.9 1.0 IH 4 0 +4.5E-03 IL 0 5 +4.5E-03 GPS 18 0 15 3 +0.9999E-01 DPH 4 18 DX DPL 18 5 DX D1 15 19 D1 D2 19 15 D2 EX1 19 0 POLY 2 15 0 3 0 0.0 -9.1757E-01 +1.9137 RO 15 3 +10.0 .ENDS HA2500
2
Application Note MM2500/02 Spice Listing
* *COPYRIGHT (C) 1991 HARRIS CORPORATION *ALL RIGHTS RESERVED * *HA-2502 MACROMODEL *REV: 8-01-91 *D.W. RIEMER * *PINOUT +IN -IN VCC VEE OUT * .SUBCKT HA2502 1 2 4 5 3 .MODEL DP D IS=1E-14 N=+15.486 .MODEL DN D IS=1E-14 N=+15.486 .MODEL DV D IS=+2.2105E-15 N=.2 .MODEL D1 D IS=1E-9 N=1 .MODEL D2 D IS=1E-9 N=+1.0 .MODEL DX D IS=1E-20 N=+30.0 * * INPUT STAGE *VALUE OF SOURCE VN MODELS VIO AND MAY BE ADJUSTED AS DESIRED. * VP 1 6 0 VN 2 7 +4E-03 I1 8 0 +2.3E-07 FA 2 0 VN +1.7391E-01 DP 6 8 DP DN 7 8 DN FP 9 0 VP +3.3478E+03 FN 0 9 VN +3.3478E+03 GC 0 9 8 0 +9.6761E-08 GPP 9 0 4 0 +9.6761E-08 GPN 9 0 5 0 +9.6761E-08 IRX 0 9 +6.2593E-07 RT 9 0 1.0 * *POLES * EP1 10 0 9 0 1.0 RP1 10 11 +1.0613E+02 CP1 11 0 1E-10 EP2 12 0 11 0 1.0 RP2 12 13 +3.184E+01 CP2 13 0 1E-10 * *OUTPUT STAGE * G2 0 14 13 0 1.0 R2 14 0 +6.5577E+02 CC 14 15 +2.2E-11 GOL 15 0 14 0 +3.5021E+02 RD 15 0 +90.0 DH 15 16 DV DL 17 15 DV ECC 16 0 POLY 1 4 0 -2.7 1.0 EEE 17 0 POLY 1 5 0 +2.9 1.0 IH 4 0 +5.0E-03 IL 0 5 +5.0E-03 GPS 18 0 15 3 +0.9999E-01 DPH 4 18 DX DPL 18 5 DX D1 15 19 D1 D2 19 15 D2 EX1 19 0 POLY 2 15 0 3 0 0.0 -9.0119E-01 +1.8974 RO 15 3 +10.0 .ENDS HA2502
3
Application Note MM2500/02 Macro-Model Schematic
+INPUT 1 VP 6 + -INPUT 2 VCC 4 VEE 5
-
DP 8
DN
7
VN
-+
I1 FA
9
GPP +
GPN + FP RT
+ 0 GC 11 CP1
-
-
FN
IRX
10 9 + 0
RP1 EP1
12 RP2 + EP2
13 CP2
-
-
15 17 DL 14 CC GOL + R2 13 + G2 RD DH EEE + IL DPL 18 GPS 15 + DPH IH 4 RO 19 + EX1 5 D1 D2
-
-
-
ECC 16
+
-
-
3
GND
3
OUTPUT
Model Performance
100
0 dB/DEG -100 -200 100 101 102 103 104 Hz 105 106 107 108
FIGURE 1. GAIN/PHASE RESPONSE vs FREQUENCY
4
Application Note MM2500/02 Model Performance
300
(Continued)
100
mV
0
-100
-300 0 100 200 TIME (ns) 300 400 500
FIGURE 2. SMALL SIGNAL RESPONSE
6.0
3.0
VLOTS
0.0
-3.0
-6.0 0.0 0.40 0.80 TIME (ns) 1.2 1.6 2.0
FIGURE 3. LARGE SIGNAL RESPONSE
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
Sales Office Headquarters
For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS NORTH AMERICA Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Harris Semiconductor PTE Ltd. No. 1 Tannery Road Cencon 1, #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400
SEMICONDUCTOR
5


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